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2013년 10월 1일 화요일

Summery for DSI

DSI is a Lane-scalable interface
  • One Clock Lane
  • One to Four Data Lanes
Transmission Mode
  • High-Speed signaling mode (differential signal) (100mV~300mV)
  • Low-Power signaling mode (single-ended signal) (0V~1.2V)  - For returning data, only use Data Lane 0 in LP Mode
Packet Types
  • Short Packet:4 bytes (fixed length) - Data ID (1byte) + Data0 (1byte) + Data1 (1byte) + ECC (1byte)
  • Long Packet:6~65541 bytes (variable length) - Packet Header (4 bytes) + Data Payload (0~65535 bytes) + Packet Footer (2 bytes)
Operation Mode
Command Mode (Similar to MPU IF)
  • Automatic mode
  • DSI PHY TE trigger
  • CMOS TE line
Video Mode (Similar to RGB IF)
  • Non-Burst Mode with Sync Pulses
  • Non-Burst Mode with Sync Events
  • Burst Mode


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